Accomplished Sr. Physical Design Engineer at Synopsys with expertise in timing analysis and closure methods. Successfully delivered on-time tapeouts while optimizing clock trees and addressing timing violations and constraints cleanup. Strong analytical problem-solver with proven cross-functional collaboration skills, enhancing design efficiency from 5 nm to 2 nm technologies.
Timing analysis expertise
Proficient in timing closure methods
Analytical problem-solving
TCL script development
Parasitic extraction techniques
Power optimization techniques
Noise reduction techniques
Cross-functional collaboration