Ram Sai Reddy Dappili

Logical Synthesis

• Counter_16 - Understanding the logical synthesis flow and implement the clock gating for dynamic power optimization successfully timing with positive slack.
• Counter_256 - Performed logical synthesis flow with TCL scripting to implement multiple iterations and to observe the changes in Area, timing and power using Multi Vt cells and achieved maximum frequency of operation and Timing closure with zero slack.

Layout Design

• To design all logical gates in 45mm technology used in chip designing NOT,NAND,NOR,OR,AND,EXOR and EXNOR and understand different rules like DCR,LVS,HALF DRF rules.

Storage Infrastructure Support at Wipro (Apr 2022 - Mar 2024)

• Debugging live issues in storage clusters which are in production and perform necessary diagnosis, troubleshooting of hardware and software systems.
• Troubleshoot hardware issues such as disk faults, PSU faults, IOM modules, NVRAM, DIMM, Motherboard, Shelf chassis, PSU, and Port failures on Storage subsystem.
• Identify and request part for any hardware failure.
• Troubleshooting Controller down scenarios and other P1 issues.
• Hands on knowledge on Multi-Path HA configuration, MetroCluster, and SAS cabling.
• Perform NetApp storage compatibility check with different types of hosts using tools such as IMT.

Dot net Developer (Nov 2021 - Apr 2022)

• Worked as Test engineer for web Application related issues
• Experience in working with Angular 2 and ASP.Net MVC
• Developed Web Application using MVC.